FIELD: computing technology.
SUBSTANCE: invention relates to a logic converter. The converter is intended to execute simple symmetric Boolean functions, containing seventeen majority elements, wherein the outputs of the ith , jth , kth , sixteenth and the output of the sixth majority elements are connected with the second inputs of the (i+1)th, (j+1)th, (k+1)th, seventeenth majority elements and the output of the logic converter, respectively, wherein the outputs of the (k-3)th and fifteenth majority elements are connected with the second inputs of the (k-2)th and sixteenth majority elements, respectively, the inputs of the (i+6)th, (i+12)th and twelfth majority elements are connected to the third inputs of the ith, (i+7)th and sixth majority elements, respectively, and the first inputs of the seventh, thirteenth and the first inputs of the mth , (m+7)th, (m+13)th majority elements, the first inputs of the fifth, twelfth, and the third input of the seventh, the second input of the thirteenth majority elements are connected with the second and (m+2)th, seventh and first information inputs of the logic converter, respectively, the third, second and first configuration inputs whereof are connected to the first input of the sixth, the third input of the (i+12)th, and the second inputs of the first, seventh majority elements, respectively.
EFFECT: simplification of the structure of the logic converter.
1 cl, 1 dwg
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Authors
Dates
2021-10-26—Published
2020-10-28—Filed