LOGIC MODULE Russian patent published in 2021 - IPC G06F7/38 G06F7/57 

FIELD: computer technology.

SUBSTANCE: invention relates to the field of computer technology. The invention is aimed to ensure the implementation of simple symmetric Boolean functions that depend on n arguments – (input binary signals) at n=7, and to reduce the relative indicator of the circuit depth. A logic module designed for implementing simple symmetric Boolean functions is disclosed, containing two elements AND, two elements OR and eight majority elements, with the second input of the first, the output of the fifth and the first input of the fourth majority elements connected respectively to the second input of the first element OR, the second input of the sixth majority element and the second tuning input of the logic module, the fifth information and first tuning inputs of which are connected respectively to the second input of the second element AND and the first inputs of the third, seventh majority elements, at the same time, the third element OR is additionally introduced into it, the first and third inputs of the first majority element are connected respectively to the first and third inputs of the first elements AND, OR, the second input of the first and i-th input of the second majority elements are connected respectively to the second input of the first element AND and the i-th inputs of the second elements AND, OR, the second inputs of the fourth, fifth, eighth majority elements and the output of the j-th element OR are connected respectively to the outputs of the third, fourth, seventh and the second input of the (4×j-1)-th of the majority elements, outputs of the j-th, seventh, the eighth majority elements and the j-th input of the third element OR are connected respectively to the third inputs of the (11-4×j)-th, fourth, sixth majority elements and the output of the j-th element AND, the third inputs of the fifth, eighth and output of the third majority elements are connected respectively to the output of the third element OR and the first input of the eighth majority element, and the i-th input of the first, the first, third inputs of the second and the first input of the fifth majority elements are connected respectively to the i-th, fourth, sixth information inputs and the second tuning input of the logic module, the seventh information input and output of which are connected respectively to the first input and output of the sixth majority element.

EFFECT: ensuring the implementation of simple symmetric Boolean functions that depend on n arguments and reducing the relative indicator of the circuit depth.

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