PROCESSOR FOR DIGITAL QUADRATIVE SEPARATION Russian patent published in 2022 - IPC G01S13/02 H03M1/00 

FIELD: electronic computers and radio engineering.

SUBSTANCE: invention relates to electronic computers and radio engineering. Analog processing channels contain a control signal switch, a bandpass filter, two controlled amplifiers, a limiting amplifier, and a low-pass filter (LPF). The synchronizer contains a first amplifier, a frequency multiplier, a bandpass filter, a clock splitter, a second and a third amplifier. The calculators contain two analogue-to-digital converters (ADC), a clock frequency splitter, three TTL buffers, a programmable logic integrated circuit (PLIC), and an LVDS buffer. The PLIC contains two digital signal processing units (SPU), a control unit, and an output data bus driver. The SPU consists of a frequency transfer unit (FTU), the first digital low-pass filter, the first decimator, the second digital low-pass filter, the second decimator, the third digital low-pass filter.

EFFECT: conversion of four analogue signals at an intermediate frequency into digital complex signals with low noise and intermodulation distortion introduced by a processing path with high sensitivity and a wide dynamic range, and is achieved due to the fact that the digital quadrature separation processor contains four analogue signal processing channels, a synchronizer and two identical calculators.

1 cl, 1 dwg