FIELD: computer engineering.
SUBSTANCE: invention relates to computer engineering and can be used in digital computing devices, as well as in digital signal processing devices, in cryptographic applications and in control systems. The device contains an n-bit adder, n single-bit adders, an (n+1)-bit adder, a multiplexer and a parallel register. The technical result of the invention is achieved due to the fact that the calculation of (Ai+Qi-1) and (Ai+Qi-1)-P is carried out in parallel, in contrast to the prototype device, where these operations are performed sequentially.
EFFECT: increasing the speed of the device.
1 cl, 1 dwg
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