FIELD: pulse devices. SUBSTANCE: device has NOR gates 1-3, inverter 4, combinatorial adder 5, two-channel digital multiplexers 6, 7, delay gates 8-15 which are RC-circuits, input bus 16, reset bus 17, writing instruction bus 18, code buses 19, output buses 20, 21. Introduced second two-channel multiplexer, third NOR gate, inverter and new connections provides possibility to reset device by reset pulse trailing edge only after analysis of its duration. Device also provides to write arbitrary information in parallel. EFFECT: increased stability to noise of reset bus, increased functional capabilities. 1 dwg
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Authors
Dates
1995-09-10—Published
1988-10-04—Filed