FIELD: pulse technique. SUBSTANCE: device has adder 1, multiplexor 2, RC delay elements 3-1,3-4, 4.1, 4-4, NOR gates 5-9, inverter 10, and decoder 11. Count direction select signals are applied to control bus 12. Clear signal is applied to bus 13 during initial setting of state, and input count pulses are applied to bus 14. Code increase or decrease is afforded by adder 1; during spaced between input signals state is saved in capacitors of delay elements. EFFECT: enlarged functional capabilities due to introduction of subtraction mode. 1 dwg
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Authors
Dates
1995-10-27—Published
1988-12-28—Filed