FIELD: microelectronics; large-scale integrated circuits using side insulation.
SUBSTANCE: proposed method includes formation of buried layers in semiconductor substrate, build-up of epitaxial film, application of masking layers, etching of grooves in epitaxial film, formation of anti-channel p+ stop regions, application of polysilicon film, and filling of grooves with silicon oxyl. Application of masking layers is followed by covering the latter with doped oxide film. Grooves are etched through thickness of epitaxial film. Then insulating film is formed on walls and bottoms of grooves prior to organizing anti-channel p+ stop regions. Oxyl is locally removed from bottom of each groove. Upon polysilicon application structure is thermally annealed in inert atmosphere, and doped polysilicon is etched selectively with respect to non-doped polysilicon. Grooves are filled up by oxidizing polysilicon filling them.
EFFECT: enhanced degree of integration and yield.
1 cl, 7 dwg
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Authors
Dates
2006-06-27—Published
1982-11-02—Filed