PROCESS OF MANUFACTURE OF INTEGRATED-CIRCUIT TRANSISTOR Russian patent published in 1996 - IPC

Abstract SU 1371445 A1

FIELD: microelectronics. SUBSTANCE: refers to manufacture of integrated circuits of high integration degree. In agreement with process of manufacture of integrated -circuit transistors first latent layer of second type of conductance is formed in silicon substrate of first type of conductance, epitaxial layer of second type of conductance is grown and combined insulation is formed. Then first layer of polycrystalline silicon and film of silicon nitride are cooled, first layer of polycristalline silicon is oxidized and passive base is formed. After this dielectric film, windows for emitter are formed, then dielectric film is formed anew and is removed by ion-reactive etching from bottom sections of silicon. Subsequent pricipitation of second layer of polycrystalline silicon is performed till planarity of entire working surface of semiconductor structure is achieved. After this second layer of polycrystalline silicon is etched till its surface is levelled with surface of first layer of polycrystalline silicon in emitter window. Later regions of active base and emitter are formed, dielectric film is etched away from horizontal surface of first layer of polycrystalline silicon and contacts are formed. Given process makes it possible to realise transistor structure of high integration degree with the use of one photomask thanks to maskless selective etching of second layer of polycrystalline silicon and silicon oxide. EFFECT: enhanced density of arrangement of elements of integrated circuits due to reduced interelectrode distances and decreased number of photlithographic operations because of subsequent etching of second layer of polycrystalline silicon and dielectric film without use of photolithography. 5 dwg

Similar patents SU1371445A1

Title Year Author Number
METHOD OF MANUFACTURING INTEGRATED CIRCUITS 1984
  • Manzha N.M.
  • Shurchkov I.O.
  • Chistjakov Ju.D.
  • Manzha L.P.
  • Patjukov S.I.
SU1195862A1
METHOD FOR PRODUCING BIPOLAR-TRANSISTOR INTEGRATED CIRCUITS 1988
  • Lukasevich M.I.
  • Manzha N.M.
  • Shevchenko A.P.
  • Solov'Eva G.P.
SU1538830A1
METHOD OF MANUFACTURING SEMICONDUCTING DEVICES WITH NEAR-WALL <P-N>-TRANSITIONS 1983
  • Manzha N.M.
  • Kokin V.N.
  • Kazurov B.I.
  • Chistjakov Ju.D.
  • Patjukov S.I.
  • Shurchkov I.O.
SU1178269A1
METHOD OF MANUFACTURING SEMICONDUCTING DEVICES WITH NEAR-WALL <P-N>-TRANSITIONS 1981
  • Manzha N.M.
  • Kokin V.N.
  • Chistjakov Ju.D.
  • Patjukov S.I.
SU1072666A1
METHOD OF MANUFACTURING INTEGRATED CIRCUITS WITH SIDE DIELECTRIC INSULATION 1982
  • Manzha N.M.
  • Patjukov S.I.
  • Shurchkov I.O.
  • Kazurov B.I.
  • Popov A.A.
  • Kokin V.N.
SU1060066A1
METHOD FOR PRODUCING INSULATION ON INTEGRATED-CIRCUIT COMPONENTS 1982
  • Manzha Nikolaj Mikhajlovich
  • Manzha Ljubov' Pavlovna
  • Shurchkov Igor' Olegovich
  • Sulimin Aleksandr Dmitrievich
  • Jachmenev Vladimir Vasil'Evich
  • Kovalenko Galina Petrovna
SU1840163A1
METHOD OF MAKING SELF-ALIGNED HIGH-VOLTAGE INTEGRATED TRANSISTOR 2012
  • Manzha Nikolaj Mikhajlovich
  • Rygalin Boris Nikolaevich
  • Pustovit Viktor Jur'Evich
RU2492546C1
METHOD OF MANUFACTURING INTEGRATED CIRCUITS 1981
  • Ishkov G.I.
  • Kokin V.N.
  • Lukasevich M.I.
  • Manzha N.M.
  • Sulimin A.D.
SU952051A1
METHOD OF MANUFACTURING SEMICONDUCTING DEVICES WITH NEAR-WALL <P-N>-TRANSITIONS 1984
  • Shurchkov I.O.
  • Manzha N.M.
  • Chistjakov Ju.D.
  • Kazurov B.I.
  • Popov A.A.
  • Patjukov S.I.
SU1215550A1
METHOD OF MANUFACTURING BIPOLAR INTEGRAL TRANSISTORS 1983
  • Lukasevich M.I.
  • Kovalenko G.P.
  • Rjabov A.I.
  • Shchepetil'Nikova Z.V.
  • Manzha N.M.
  • Patjukov S.I.
SU1135378A1

SU 1 371 445 A1

Authors

Manzha N.M.

Patjukov S.I.

Chistjakov Ju.D.

Manzha L.P.

Dates

1996-04-27Published

1985-09-16Filed