DECODER OF REED-SOLOMON CODE Russian patent published in 1994 - IPC

Abstract RU 2007040 C1

FIELD: communications and computer engineering. SUBSTANCE: clearing value storage unit 13, parity-check sequence storage unit 14, error location calculation unit 15, mask generation unit 16, clearing correction unit 17 are introduced to accomplish the goal of invention. This results in additional detection of part of single-bit or multi-bit errors if there are clearings and detection of double-bit or multi-bit errors without clearings. EFFECT: increased stability to noise of Reed-Solomon code. 2 dwg

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RU 2 007 040 C1

Authors

Kognovitskij O.S.

Budanov A.V.

Bryzgina G.P.

El'Nikov A.B.

Dates

1994-01-30—Published

1991-04-29—Filed