FIELD: computer engineering. SUBSTANCE: device has five registers, buffer register, buffer exchange unit, three buffer units, syndrome generator, two flag registers, erase counter, two locator storage units, locator generator, locator multiplexer, flag controller, locator address controller, buffer flag unit, buffer locator unit, zero-signal detector, analysis register, five multiplexers, main storage unit, adder, arithmetic and logical unit, two comparators, constants storage unit, coder, instruction converter, synchronizing unit, instruction storage unit, instruction register, operating bus, data bus, flag-signal bus, control input, correction address output, control output, check output, synchronization bus, control bus. Device functions to encode or decode accepted words arriving over data bus and in decoding them it can correct as many as two errors within one word or to erase erroneous latters. Device can process contiguous data flow. EFFECT: improved informative capacity and simplified design. 7 dwg, 1 tbl
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Authors
Dates
1995-06-09—Published
1991-06-28—Filed