FIELD: communications and computer engineering. SUBSTANCE: decoder 14 is introduced to accomplish the goal of invention. This results in use of only one equation for single-bit error detection in single-bit error indication unit 7. In addition device has parity-check sequence computation unit 1, buffer accumulating unit 2, error location calculation unit 6, mask generation unit 5, indication unit 7, parity-check sequence storage unit 12, switches unit 11, adders unit 9. EFFECT: simplified design and increased reliability. 1 dwg
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Authors
Dates
1994-01-30—Published
1991-07-03—Filed