FIELD: automatics; computer technology. SUBSTANCE: modulo addition and subtraction is performed for special module m1 and m2 (m1·m2 ≥ m), where m is modulo of operation; modulo operation is subsequently converted to the result. Device has decoder 2, two units 3 and 14 of AND gates, two groups 27,28 of OR gates, five AND gates 6, 7, 22, 24, 25, two INHIBITION gates 11, 23, two code converters 18, 19, two counters 13, 20, two OR-NOT gates 12, 21, commutator 29, coder 15, two annular shift registers 5, 26. EFFECT: improved efficiency. 3 tbl, 1 dwg
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Authors
Dates
1994-08-30—Published
1991-07-08—Filed