DEVICE FOR SUMMING AND SUBTRACTING VALUES IN MODULO Russian patent published in 1994 - IPC

FIELD: automatics; computer technology. SUBSTANCE: the third and the fourth counters 15 and 25 are introduced into the device, four OR-NOT gates, the second INHIBITION gate 31, the fourth to the ninth units of AND gates, the second to the eighth code converters, the second to the fourth units of OR gates, two OR gates, AND gate 42 and decoder 41. The first and the second operands A and B are decomposed for partial modules m₁ and m₂ ( m₁·m₂≥ m where m is module of operation). Module subtraction (addition) is performed simultaneously for any partial module accompanied with correction of any partial result if necessary. After that the result is converted into result of module operation. EFFECT: improved speed of operation. 1 dwg, 5 tbl