FIELD: automation and computer engineering. SUBSTANCE: device has three n-bit input registers which are connected to inputs of group of n majority selection gates and to corresponding inputs of three groups of n "equality" gates. Outputs of each of these groups are connected to corresponding inputs of AND gates. Outputs of AND gates are connected to inputs of OR gate which output is connected to control input commutator having n channels. Inputs of commutator are connected to corresponding outputs of group of majority selection gates. EFFECT: increased reliability of generation of output signals. 2 tbl, 1 dwg
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Authors
Dates
1995-06-19—Published
1990-07-09—Filed