SYNCHRONOUS RATE DIVIDER Russian patent published in 1995 - IPC

FIELD: pulse devices. SUBSTANCE: device has N-bit pulse counter which has group having N (n+1) JK-flip-flops, circuit of shifting gates, group of inter- bit connection gates, circuit for synchronous start with inverter and inverse logic matching gate, where n 0, 1, 2, i, In addition device has input and output signal wires "Input" and "Output", and two-stage pre-setting decoder which first stage has matching unit with (n-1) inputs and which second stage has matching unit with two inputs. Maximal rate of output pulses is greater than half of its nominal value which is provided by synchronous JK-flip-flop which can be set by R-input and which serves as basic element for design of pulse counter on which described device is based. EFFECT: division of pulse rate by arbitrary natural factor ranging from 2^n-1+1 to 2ⁿ-1. 2 dwg, 1 tbl