FIELD: digital pulse engineering; shaping accurate time spaces in various devices. SUBSTANCE: n-bit controlled frequency scaler with division ratio between 2 + 2 and 2 - 2 is made in the form of Gray-code synchronous pulse counter using double-stage synchronizing circuit of JK flip- flops of all bits. Frequency scaler has (n+1) input bus of n-bit control code, logic inverter, six 2AND-NOT gates of inversion logic, (n+1) JK flip-flops, (m-3) double-input coincidence gates of first through carry circuit, (m-2) double- input coincidence gates for bit-to-bit coupling of JK flip-flops of less significant bits, two decoders, (n-m-2) 2AND gates of second through carry circuit, (n-m-1) 2AND gates for bit-to-bit coupling of JK flip-flops of more significant bits, four NAND gates, (n+1) logic pairs of 3AND-NOT gates. EFFECT: improved design . 2 dwg, 1 tbl
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Authors
Dates
1998-09-20—Published
1996-07-10—Filed