FIELD: computer engineering. SUBSTANCE: device has k modulo-two adders (k=[log2n], n is bit length of input binary word and p majority gates (p= [n/2] ). Threshold of each s-th majority gate is 2s. Multiple-input single bit adder proceeds as follows. Binary variables x1 ... xn are received in arbitrary order by inputs. Boolean functions fo ... fk are generated at outputs. They represent binary code of number of noes over set of input variables {x1,x2, ... , xn}. EFFECT: simplified design, increased speed. 1 dwg
Title | Year | Author | Number |
---|---|---|---|
DEVICE FOR ADDITION AND SUBTRACTION OF N INTEGERS BY MODULO 2-1 | 1992 |
|
RU2047897C1 |
DEVICE FOR GENERATION OF MODULO-THREE REMAINDER | 1992 |
|
RU2045770C1 |
DEVICE FOR CALCULATION OF SYMMETRICAL BOOLEAN FUNCTIONS | 1992 |
|
RU2047894C1 |
DEVICE FOR CALCULATION OF SYMMETRICAL BOOLEAN FUNCTIONS | 1992 |
|
RU2047892C1 |
MULTIFUNCTIONAL LOGICAL UNIT | 1991 |
|
RU2045769C1 |
DEVICE FOR CALCULATION OF SYMMETRICAL BOOLEAN FUNCTIONS | 1992 |
|
RU2047893C1 |
DEVICE FOR GENERATION OF MODULO-FIVE REMAINDER | 1992 |
|
RU2045771C1 |
DEVICE FOR MODULO N ADDITION OF THREE NUMBERS | 1992 |
|
RU2018929C1 |
DEVICE FOR MODULO N ADDING OF SEVEN NUMBERS | 1992 |
|
RU2018930C1 |
DEVICE FOR CALCULATION OF SYMMETRIC BOOLEAN FUNCTIONS | 0 |
|
SU1833860A1 |
Authors
Dates
1995-10-27—Published
1992-10-12—Filed