MULTIPLE-INPUT SINGLE-BIT ADDER Russian patent published in 1995 - IPC

Abstract RU 2047216 C1

FIELD: computer engineering. SUBSTANCE: device has k modulo-two adders (k=[log2n], n is bit length of input binary word and p majority gates (p= [n/2] ). Threshold of each s-th majority gate is 2s. Multiple-input single bit adder proceeds as follows. Binary variables x1 ... xn are received in arbitrary order by inputs. Boolean functions fo ... fk are generated at outputs. They represent binary code of number of noes over set of input variables {x1,x2, ... , xn}. EFFECT: simplified design, increased speed. 1 dwg

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RU 2 047 216 C1

Authors

Avgul' Leonid Boleslavovich[By]

Kurnosenko Sergej Vasil'Evich[By]

Suprun Valerij Pavlovich[By]

Dates

1995-10-27Published

1992-10-12Filed