PARALLEL PROCESSOR SYSTEM Russian patent published in 1997 - IPC

FIELD: computer engineering, in particular, parallel array processing. SUBSTANCE: device is designed as N-dimensional matrix of byte-length processing units each of which is connected to corresponding segment of byte- length memory unit and controller. Shared part of matrix has several process units and is located on silicon chip which has pickets. Each element of process matrix is designed as processor element and local memory for processing bytes with parallel information bits for single clock pulse. EFFECT: simplified design, possibility of chip implementation, possibility of operations in air- cooled environment. 6 cl, 7 dwg