FIELD: pulse devices, computer engineering and control systems. SUBSTANCE: device has D flip-flops 1...8, which triggered by level, code comparison circuits 9, 10, single pulse generators 11, 12, inverter 13, NOR gates 14, 15, 16, NAND gates 17, 18, XOR gate 19, input line 20, output line 21, clock line 22, control lines 23, 24. Goal of invention is achieved by introduced code comparison circuits 9, 10, generators 11, 12, inverter 13, NOR gates 14, 15, 16, NAND gates 17, 18, XOR gate 19, control lines 23 and 24 and new functional connections. EFFECT: increased reliability of information input and shift. 3 cl, 4 dwg
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Authors
Dates
1998-02-20—Published
1995-08-16—Filed