FLIP-FLOP DEVICE Russian patent published in 1998 - IPC

FIELD: pulse engineering. SUBSTANCE: flip-flop device has RS flip-flop 1 whose set and reset inputs are connected to first leads of first and second resistors, respectively, and through first and second capacitors 4 and 5, respectively, to common bus; its direct and inverted outputs are connected to direct inputs of first and second EXCLUSIVE OR gates 6 and 7, respectively, whose second inputs are connected to device input bus 8 and outputs are connected to write inputs of first and second core memories 9 and 10, respectively, whose read-winding inputs are connected to common bus. Flip-flop device also has first and second NAND gates 11 and 12, third and fourth EXCLUSIVE OR gates 13 and 14, third, fourth, fifth, and sixth resistors, 15, 16, 17, and 18. RS flip-flop is built around NAND gates. Outputs of first and second EXCLUSIVE OR gates 6 and 7 are connected to first inputs of third and fourth EXCLUSIVE OR gates, 13 and 14, respectively, whose outputs are connected through third and fourth resistors 15 and 16, respectively, to write-winding outputs of first and second core memories 9 and 10, respectively; their read-winding outputs are connected through fifth and sixth resistor 17 and 18, respectively, to first inputs of first and second NAND gates, respectively, whose outputs are connected to second outputs of second and first resistors 3 and 2, respectively, and to second inputs of fourth and third EXCLUSIVE OR gates 14 and 13, respectively. Second inputs of NAND gates 11 and 12 are connected to input bus 8. EFFECT: improved speed of response. 1 dwg