MATRIX COMMUTATOR ASSEMBLY Russian patent published in 1998 - IPC

Abstract RU 2116664 C1

FIELD: commutation of special-purpose multiprocessor systems, microcontroller networks and units of parallel information exchange in telemetry systems. SUBSTANCE: device has first, second and third units for processing message queues, multiplexer, unit for analysis of message queues, register, decoder, synchronization unit, flip-flop, first AND gate. Goal of invention is achieved by introduced message transmission unit, second to eighth AND gates, first to fourth OR gates. Device provides connection of any of three input channels to any of three output channels. Messages from different input channels are received simultaneously. EFFECT: increased functional capabilities, possibility to design commutation structures for adaptive message routing, facilitated scalability for fixed message length. 7 dwg, 1 tbl

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RU 2 116 664 C1

Authors

Zotov I.V.

Koloskov V.A.

Titov V.S.

Dates

1998-07-27Published

1996-04-24Filed