FIELD: automation and computer engineering, in particular, equipment for residual class operations. SUBSTANCE: device has information and test circuits, testing unit, group of OR gates, decoder and four OR gates. In addition device has group of converters from position code to Fibonacci p-code and group of converters from Fibonacci p-code to position code. Goal of invention is achieved by masking failed bits in each calculation circuit. EFFECT: increased number of possible device faults under which device is kept in operating order. 1 dwg, 2 ex, 1 tbl
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Authors
Dates
1998-12-10—Published
1997-12-04—Filed