FIELD: frequency synthesizing for radio communication systems. SUBSTANCE: synthesizer has variable- frequency oscillator whose output signal is used as that of frequency synthesizer and is passed to variable-ratio divider. Output signal of the latter is transferred to one input of phase detector whose other input receives signals from reference oscillator. Output signal of phase detector controls variable-frequency oscillator. Variable-ratio divider has its division ratio varying with time by fractional division system using several storage registers so that actual division ratio can vary in fractional steps. Varying-with-time division sequence applied to variable-ratio divider causes residual stray level in output signal. For reducing this stray level, fractional-division system incorporating several storage registers shapes second digital sequence used for output signal of phase detector. EFFECT: improved correction of residual error with better quality and higher speed of storage registers. 10 cl, 6 dwg
