FIELD: communication, in particular, using serial port of digital signal processor. SUBSTANCE: goal of invention is achieved by decreasing value of reception timer counter by specific threshold in order to suppress reception of start bit when asynchronous data are received through serial port, so that data are read in middle of pulse period for each bit of data signal, while pulse period for each bit of transmitted signal is regulated and transmitted by setting transmission timer counter to zero value in initial moment of transmission of start bit upon data transmission. EFFECT: prevention of commutation errors. 5 cl, 6 dwg
