FLIP-FLOP WITH THREE STABLE STATES AND COMMON OUTPUT Russian patent published in 2000 - IPC

Abstract RU 2146415 C1

FIELD: pulse electronics for automatic control systems. SUBSTANCE: input trigger pulses build up potential across common output whose polarity depends on that of trigger pulse and zero potential set up across input interrupts output pulse and resets flip-flop to initial state with output voltage equal to zero. Flip-flop has two parallel- connected switches whose transistors 1,2 are of different polarity of conductivity and their collectors are combined and form common output with respect to ground point of two series-connected power supplies. Upon termination of trigger pulse action output voltage is saved due to positive feedback circuit connected in parallel with switches. It is set up of two amplifiers whose series-connected transistors 3 and 4 are of different polarity of conductivity and their interconnected emitters are grounded through low-value common resistor. EFFECT: provision for eliminating false information during turn-on period and indicating not only signal but also its polarity. 17 dwg

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RU 2 146 415 C1

Authors

Solntsev B.A.

Dates

2000-03-10Published

1998-10-07Filed