FIELD: computer engineering; programmable controllers for automatic process control systems and research experiment automation systems. SUBSTANCE: device has central processor unit, 2-AND gate, timing-instruction random-access memory device, output channels unit, binary counter, control panel, device interface, nine data-control buses, random-access memory, read-only memory, experiment timer unit, instruction pulse output timer unit, output amplifiers unit, and two buffer registers. Device provides for concurrent implementation of programs of cyclic and non- cyclic type with high-precision output of timing control instructions by actuating members. EFFECT: enlarged functional capabilities. 2 dwg
Authors
Dates
2003-02-20—Published
2001-10-09—Filed