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(19)

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2 224 356

(13)

(51)

IPC

(21) (22)

Application

2002105329/09, 2002-02-26

(24)

Start date

2002-02-26

(22)

Actual filing date

2002-02-26

(45)

Published

2004-02-20

(72)

Inventor

Anashkin D.N.Shishkin G.I.

(73)

Holder

Rossijskij Federal'Nyj Jadernyj Tsentr Vserossijskij Nauchno-Issledovatel'Skij Institut Ehksperimental'Noj Fiziki

MEMORY LOCATION Russian patent published in 2004 - IPC

Abstract RU 2224356 C2

FIELD: pulse engineering; computers and control systems. SUBSTANCE: device has switching unit, N series RC circuits, asynchronous D flip-flop, two bidirectional switches, three NOR gates, multiplexer, pulse counter, and two synchronous D flip-flops. EFFECT: enhanced reliability in memory saving mode. 1 cl, 1 dwg

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RU 2 224 356 C2

Authors

Anashkin D.N.

Shishkin G.I.

Dates

2004-02-20—Published

2002-02-26—Filed