FIELD: data processing systems supporting vector operations and provided with register bank. SUBSTANCE: data processing device has register bank with set of addressed registers and instruction decoder responding to at least one data processing instruction defining vector operation for multiple execution of data processing operation using data taken from register chain in register bank starting from initial register defined in mentioned data processing instruction; register bank incorporates at least one subset of registers; instruction decoder is designed to control register sequence so as to afford endless loop within mentioned subset of registers. Relevant method describes operation of device. EFFECT: enhanced efficiency and data processing speed of device. 15 cl, 19 dwg, 33 tbl
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