PHASE-LOCKED LOOP CIRCUIT Russian patent published in 2004 - IPC

FIELD: radio engineering. SUBSTANCE: proposed PLL circuit that can be used to generate clock signal for digital processing of video signal coming from television broadcast station has phase comparator, circuit filter, voltage-controlled generator, and cycle counter, as well as prediction window circuit that generates HWIN signal for predicting positions in which REF signals are built up and reference-signal skip compensating circuit that detects loss of REF signal, if any, in HWIN signal and generates high-precision signal d.REFX supplied to voltage-controlled generator to compensate for loss and d.VARX signal to compensate for phase difference between comparison signal VAR and d.REFX signal. EFFECT: enhanced stability of clock signal generated for digital processing of video signal. 19 cl, 22 dwg