ACCUMULATING TYPE ADDER Russian patent published in 2006 - IPC G06F7/50 

Abstract RU 2269153 C2

FIELD: computer science and engineering, possible use for constructing microprocessors and digital automation devices.

SUBSTANCE: adder has two RS-triggers, nine AND elements, five OR elements, NOT element, ten control buses. Adder performs operations of addition and subtraction, operations for bitwise shifting of code to left and right, inversion, two-module addition, logical addition and logical multiplication.

EFFECT: improved speed of operation, broadened list of arithmetic and logical operations possible to execute.

2 cl, 1 dwg

Similar patents RU2269153C2

Title Year Author Number
ACCUMULATING TYPE ADDER 2004
  • Vlasov B.M.
RU2262735C1
ACCUMULATION-TYPE ADDER 2003
  • Vlasov B.M.
RU2261469C1
COMBINATION-ACCUMULATION TYPE ADDER 2004
  • Vlasov B.M.
RU2262736C1
METHOD AND SYSTEM OF EXECUTING CALCULATION OPERATIONS WITH MINIMAL COST OF EQUIPMENT 2005
  • Vlasov Boris Mikhajlovich
RU2287849C1
REVERSE SHIFT REGISTER 2006
  • Vlasov Boris Mikhajlovich
RU2309536C1
ACCUMULATING-TYPE ADDER 2004
  • Vlasov Boris Mikhajlovich
  • Korovichev Boris Konstantinovich
  • Krasnov Aleksandr Vasil'Evich
RU2278411C1
COUNTER-TYPE ADDER 2005
  • Vlasov Boris Mikhajlovich
  • Korovichev Boris Konstantinovich
  • Krasnov Aleksandr Vasil'Evich
  • Loginov Vladimir Aleksandrovich
RU2288501C1
METHOD AND DEVICE FOR EXECUTING ARITHMETIC AND LOGICAL OPERATIONS 2005
  • Vlasov Boris Mikhajlovich
RU2295751C2
METHOD AND DEVICE FOR ADDING 2005
  • Vlasov Aleksandr Mikhajlovich
  • Vlasov Boris Mikhajlovich
  • Krasnov Aleksandr Vasil'Evich
  • Sokolov Andrej Olegovich
RU2308073C2
METHODS OF EXECUTING COMPUTATIONAL PRIMITIVES AND DEVICE THEREFOR 2013
  • Vlasov Boris Mikhajlovich
RU2553221C2

RU 2 269 153 C2

Authors

Vlasov Boris Mikhajlovich

Dates

2006-01-27Published

2003-11-24Filed