FIELD: computer engineering, possible use in computer processors and digital automatic devices.
SUBSTANCE: in accordance to the invention, each bit of device contains one RS-trigger, eight AND elements, three OR elements, four NOT elements, six control buses.
EFFECT: simplification of device, expanded range of executed operations and increased speed of calculations with minimal equipment costs.
2 cl, 1 dwg
| Title | Year | Author | Number |
|---|---|---|---|
| COMBINATION-ACCUMULATION TYPE ADDER | 2004 |
|
RU2262736C1 |
| ADDER | 2004 |
|
RU2264646C2 |
| SHIFT REGISTER | 2007 |
|
RU2344498C1 |
| ACCUMULATING TYPE ADDER | 2004 |
|
RU2262735C1 |
| IMPULSE COUNTER | 2005 |
|
RU2284654C2 |
| COINCIDENCE-ACCUMULATION TYPE ADDER | 2006 |
|
RU2306596C1 |
| ACCUMULATING TYPE ADDER | 2003 |
|
RU2269153C2 |
| METHOD AND SYSTEM OF EXECUTING CALCULATION OPERATIONS WITH MINIMAL COST OF EQUIPMENT | 2005 |
|
RU2287849C1 |
| ACCUMULATION-TYPE ADDER | 2003 |
|
RU2261469C1 |
| PULSE COUNTER | 2010 |
|
RU2419200C1 |
