METHOD OF TESTABLE REALISATION OF LOGICAL CONVERTERS Russian patent published in 2011 - IPC G06F11/26 

FIELD: electricity.

SUBSTANCE: method of testable realisation of logical converters includes initial production of initial mathematical description of operating law of functioning of n-inlet converters in testable logical basis of Zhegalkin, development and realisation of structural circuit of logical converter, detection of quantity and structure of n test signals and structure of reference signal and their generation of external technical facilities, organisation, with the help of additional external control signal, working mode of operation and mode of testing of logical converter, besides, in working mode k-argument functions AND are realised by serial chains from (k-1) two-inlet logical elements AND, every of which in mode of testing is electronically and simultaneously built up to double-digit logical elements of equivalence, which realise k-digit logical functions of equivalence above inlet arguments, such as n test M-sequences of one and the same closed class in testing mode.

EFFECT: improved testability of logical converters in testing of their proper functioning at limit working frequency.

2 dwg