FIELD: information technologies.
SUBSTANCE: according to methods and a device disclosed in this document, processor caching policies are determined using information on caching policy linked to a target storage device, which is addressed in process of time operations. According to one of versions of processor realisation, the processor comprises at least one cache memory and a unit of memory control. At least one cache memory is arranged with the possibility to store information, which is local for processor. The memory control unit is arranged with the possibility to establish one or more caching policies, at least for one cache memory. The memory control unit establishes one or more caching policies, based on information on caching policy, linked to one or more target storage devices, arranged with the possibility to store information used by a processor.
EFFECT: improved efficiency of a processor with the help of caching policy determination for a current memory transaction, based on information on caching policy, linked to a target storage device, which is addressed during a certain memory operation.
23 cl, 7 dwg
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Authors
Dates
2011-08-27—Published
2008-01-24—Filed