FIELD: information technologies.
SUBSTANCE: method and device to handle exception with a floating point in a processor performs instructions with one flow of instructions and multiple data flows (SIMD). Number exceptions are identified for an operation with a floating point of SIMD, and SIMD microoperations are initiated to generate two packet partial results of a packet result for an operation of SIMD floating point. A microoperation of SIMD denormalisation is initiated to combine two packet partial results and to denormalise one or more elements of combined packet partial results, to generate a packet result for operation with SIMD floating point, having one or more denormalised elements. Flags are sent and stored with packet partial results for identification of denormalised elements.
EFFECT: improved efficiency with usage of non-normalised numbers.
22 cl, 9 dwg, 1 tbl
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SU1361542A1 |
| DEVICE FOR ROUNDING OFF SUM AND DIFFERENCE OF BINARY-CODED NUMBERS WITH FLOATING POINT | 0 |
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SU1339549A1 |
| METHOD, DEVICE AND COMMAND FOR PERFORMING SIGN MULTIPLICATION OPERATION | 2003 |
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RU2275677C2 |
