FIELD: information technology.
SUBSTANCE: method involves the following steps: in processor control selector module, rounding-off instruction of command set architecture user level is received which instruction has format including source operand, destination operand and directly obtained value; determination is executed if the indicator of rounding-off of directly obtained value mode cancellation saved in processor control register is active, by means of decoding directly obtained value in processor control selector module; if so the field of directly obtained value rounding-off mode is received and decoded in control selector module to obtain rounding-off mode, herewith, rounding-off mode field is separated from cancellation indicator; source operand and rounding-off mode control information is transferred to processor floating-point module connected with control selector module; rounding-off operation is executed by source operand in processor floating-point module which is responsible for user-level rounding-off instruction, and according to control information.
EFFECT: reducing time and complexity of operation execution.
20 cl, 5 dwg, 6 tbl
Title | Year | Author | Number |
---|---|---|---|
ROUNDING-OFF IN ACCORDANCE WITH INSTRUCTIONS | 2007 |
|
RU2420790C2 |
INSTRUCTION AND LOGICAL CIRCUIT TO CARRY OUT DOT PRODUCT OPERATION | 2007 |
|
RU2421796C2 |
EFFICIENT PARALLEL PROCESSING OF EXCEPTION WITH FLOATING POINT IN PROCESSOR | 2009 |
|
RU2427897C2 |
THREE SOURCE OPERAND FLOATING POINT ADDITION PROCESSORS, METHODS, SYSTEMS AND INSTRUCTIONS | 2014 |
|
RU2656730C2 |
MODULE FOR COPROCESSOR CACHE | 2011 |
|
RU2586589C2 |
LOW WATTAGE FLOATING-POINT PROCESSOR FOR SELECTED SUB-ACCURACY | 2007 |
|
RU2412462C2 |
PROCESSORS, METHODS, SYSTEMS AND INSTRUCTIONS FOR TRANSCODING POINTS OF UNICODE VARIABLE LENGTH CODE | 2014 |
|
RU2638766C2 |
INTEGER-VALUED HIGH ORDER MULTIPLICATION WITH TRUNCATION AND SHIFT IN ARCHITECTURE WITH ONE COMMANDS FLOW AND MULTIPLE DATA FLOWS | 2003 |
|
RU2263947C2 |
UNLIMITED TRANSACTIONAL MEMORY WITH ASSURANCES OF MOVEMENT DURING TRANSFER, USING HARDWARE GLOBAL LOCK | 2014 |
|
RU2597506C2 |
SCALAR-VECTOR PROCESSOR | 2021 |
|
RU2781355C1 |
Authors
Dates
2012-04-10—Published
2011-01-25—Filed