FIELD: information technology.
SUBSTANCE: number of adders used must be greater than O(nlog2n), wherein a delay of not more than t3log2n in counting the index numbers of bits and the total number of high bits is provided, where t3 is the delay of the adder with retention of the carry-over, wherein the number of adders used in the apparatus is equal to nlog2n. The high-speed apparatus for counting the index numbers of high bits in a data line, according to solution, is characterised by that it has n binary inputs 
for bits of the input data line, n outputs 
for the index numbers of high bits, a POPCNT output for the number of high bits, n AND elements 
each having an output Y connected to the output Qj, a first input X1 and a second binary input X2, hierarchical computation levels 
each having 2m inputs Di and 2m outputs 
Each computation level 
consists of a first and a second computation level Lm-i and 2m-1 adders 
having a first A and a second B input and an output C.
EFFECT: high-speed counting of index numbers of bits and total number of high bits in a data line with length n.
5 dwg
