CACHING APPARATUS, METHOD AND SYSTEM Russian patent published in 2013 - IPC G06F12/08 

FIELD: information technology.

SUBSTANCE: caching apparatus has: cache memory for storing one or more entries, wherein each entry corresponds to an input/output memory access request, and each entry should contain a guest physical address (GPA) which corresponds to the input/output memory access request, and a corresponding host physical address (HPA); and a first logic circuitry which receives a first input/output memory access request from a terminal device and determines the first input/output memory access request includes future access prompting associated with an address, wherein the future access prompting should indicate to the host whether the address can be accessed in the future, and entries in the cache memory which do not contain prompting which corresponds to the previous input/output memory access requests, containing future access prompting should be replaced with earlier entries which contain prompting; and the first logic circuitry should provide updating of one or more bits, which corresponds to the address of both the entry in the cache memory and the entry in the input/output translation look-aside buffer (IOTLB), in response to the determination that the first input/output memory access request includes a future access prompt.

EFFECT: improved address translation caching during virtualisation for directed input/output.

19 cl, 4 dwg