FIELD: information technology.
SUBSTANCE: apparatus for managing matrices has an on-chip system switch fabric (OSF) used to connect the processor to the logic unit; and memory for storing a shadow address which corresponds to a physical address in response to a user-level request, wherein the OSF contains a logic system for determining the physical address from the shadow address, performed so as to determine the physical address and invert one or more high bits of the shadow address in order to determine the physical address.
EFFECT: faster operation.
27 cl, 7 dwg
