REDUNDANT VOLTAGE STABILISER BASED ON MIS TRANSISTORS Russian patent published in 2013 - IPC G05F1/565 

Abstract RU 2487392 C2

FIELD: electrical engineering.

SUBSTANCE: redundant voltage stabiliser based on MIS transistors with positive outputs of each voltage stabiliser are connected through diodes at the load and source of the regulating MIS transistor through measuring resistance is connected to the stabiliser output and to the base of current-limiting n-p-n transistor while emitter of this transistor is connected to the stabiliser output and collector to the gate of regulating MIS transistor; there is an additional tripping MIS transistor with p-channel connected in-series between positive output and drain of the regulating MIS transistor, its emitter is connected to the connection point of drains of MIS transistors and its base through Zener diode and resistor connected in-series is connected to the stabiliser output; n-p-n transistor with emitter connected to the common point, the base through resistance is connected to the collector of p-n-p transistor and collector through resistor to the gate of a tripping MIS transistor; starting capacitor which is connected between the collector and emitter of n-p-n transistor; limiting resistor connected between the output of reference-voltage source and the gate of regulating MIS transistor.

EFFECT: reliability improvement.

1 dwg

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RU 2 487 392 C2

Authors

Mikheev Pavel Vasil'Evich

Kapustin Aleksandr Nikolaevich

Kvakina Anzhelika Anatol'Evna

Dates

2013-07-10Published

2011-07-08Filed