FIELD: information technology.
SUBSTANCE: disclosed is a method for range verification of printed-circuit boards from binary images thereof, which, unlike the existing method, includes counting the number of compressed and defocused sections of a source image matrix; detecting sinks in conductor strips, assigning said sinks a conductor attribute; correcting the source image matrix; counting the number of compressed and defocused sections of the corrected matrix, as well as the total number of defects, the number of joints to the compressed and defocused regions, the number of associated defects of the corrected matrix corresponding to the number of metal coating sections; determining the number of unassociated defects as the difference between the total number of defects and sections adjoining to the compressed and defocused regions; generating a reference number as the difference between the number of associated sections in the corrected matrix and the number of unassociated defects; comparing the number of compressed and defocused sections of the source image matrix with the reference number; equality of said numbers indicates absence of unallowable constrictions in conductors; comparing the number of compressed and defocused sections of the corrected matrix with the reference number, wherein equality of said numbers indicates that sinks are either absent or are located on the periphery of conductor lines and do not lead to unallowable constrictions.
EFFECT: high efficiency of inspection by avoiding the procedure of determining the connection of each defective section and broader functional capabilities owing to determination of the number of sinks on conductor strips.
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Authors
Dates
2014-07-20—Published
2013-07-09—Filed