FIELD: electricity.
SUBSTANCE: invention relates to electrical engineering, to a transmitting cascade in a bus assembly of a bus network, mainly in a bus assembly of EIB-network, which is connected to a bus line (Bus+, Bus-), for generation of a bit signal that corresponds to a transmitted signal that has a sequence of transmitted pulses and that consists of an active pulse for each transmitted pulse, which has duration Δt=t1-t0, with that, t0 indicates the beginning of the active pulse, and t1 - at the end of active pulse, and depth Ua of pulse, and an equalising pulse following after the active pulse, with circuit (A) for generation of active pulse, optionally, with circuit (B) for generation of the equalising pulse and at least one control circuit (C) that outputs transmitted signal (Usend) at least to circuit (A) for generation of active pulse. Pulse depth (Ua) of active pulse is set by the specified reference voltage (Uref) that is independent of the value of constant voltage component of a bit signal.
EFFECT: possible replacement of active elements with passive components.
6 cl, 6 dwg
Authors
Dates
2014-07-27—Published
2010-01-29—Filed