FIELD: information technology.
SUBSTANCE: device comprises a group of n inverters, n groups of transmitting transistors, a group 2n of inverters of setting, an output inverter, a group 2n of transistors of variables, a group 2n of transistors of shut-off of setting, an inverter of controlling the group of transistors of variables, a transistor of test control.
EFFECT: reduction of time of performance testing.
4 dwg, 9 tbl
| Title | Year | Author | Number |
|---|---|---|---|
| PROGRAMMABLE LOGIC DEVICE | 2014 |
|
RU2547229C1 |
| PROGRAMMABLE LOGIC DEVICE | 2014 |
|
RU2602780C2 |
| PROGRAMMABLE LOGICAL DEVICE | 2014 |
|
RU2573732C2 |
| PROGRAMMABLE LOGIC DEVICE | 2014 |
|
RU2544750C1 |
| PROGRAMMABLE LOGICAL DEVICE | 2016 |
|
RU2637462C1 |
| PROGRAMMABLE LOGIC DEVICE | 2023 |
|
RU2818802C1 |
| PROGRAMMABLE LOGIC DEVICE | 2015 |
|
RU2601145C1 |
| PROGRAMMABLE LOGIC DEVICE | 2017 |
|
RU2653304C1 |
| PROGRAMMABLE LOGIC DEVICE | 2017 |
|
RU2653301C1 |
| CELL OF STATIC RANDOM ACCESS MEMORY | 2014 |
|
RU2573226C2 |
