FIELD: information technology.
SUBSTANCE: invention relates to digital communication and signalling and can be used for quasi-optimal asynchronous messages reception. Device includes comparator with operation threshold on average level (1), n-bit shift register (2), weight adder (3), threshold device (4), clock pulse generator (5), three integrators (6-8) with low value of time constant, reset switches (9) and (10), multiplexers (11, 12), buffer amplifier (13), inverter (14), demultiplexer (15), three integrators with high value of time constant (16-18), three comparators (19-21) and original timing interval selector shift register (22).
EFFECT: ease of implementation and high reliability of filter operation.
1 cl, 5 dwg
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