CACHE PREDICTING METHOD AND DEVICE Russian patent published in 2016 - IPC G06F9/38 

FIELD: data processing.

SUBSTANCE: invention relates to microprocessor cache commands forecasts and, in particular, to predict the next microprocessor selected commands branch command. Technical result is achieved due to branches prediction (BPU) for selected branch in processing unit next command prediction. BPU has versions history memory, containing branching sources addresses and branching indicators, cache destinations buffer and prediction cache logic circuit. By means of commands search counter (PC) circuit finds branching indicator in memory, which indicates selected branch predicted command. Circuit selects first found branching indicator, and using first found branching indicator circuit extracts from memory address of first instruction branching source predicted selected branch. If extracted branching source address is branching source address, closest to search PC, circuit outputs it as next PC branching addressee. Then performs prediction stop.

EFFECT: technical result consists in improvement of performance characteristics of processor with conveyor processing, involving reduction of power consumption.

15 cl, 6 dwg, 3 tbl