METHOD OF FORMING S-BLOCK Russian patent published in 2017 - IPC H04L9/06 G09C1/04 

FIELD: information technology.

SUBSTANCE: invention relates to information processing and cryptography and, in particular, to methods of forming S-blocks for replacement with minimum number of logic elements. Proposed method consists of an analytical step, which comprises successive decomposition of initial polynomials, setting S-block, into a sum and product of simpler polynomials, implementation of which requires less total circuit design costs, a synthesis phase, on which are created circuits for implementing said polynomials which cannot be simplified further and on basis of said circuits in reverse order of decomposition final logic circuit for implementation S-block is built, and a third step, during which final logic circuit is implemented in electronic circuit.

EFFECT: reduced circuit design costs when implementing S-block using logic elements & and ⊕ (XOR), providing possibility of taking into account various circuit design costs on implementation of elements & and ⊕ in process of minimising resultant logic circuit of S-block.

1 cl, 6 dwg