FIELD: electricity.
SUBSTANCE: proposed RS-trigger, which includes a first one (S) and the second 2 (R) logic input devices, the first 3-inverting logic element "I" with the first 4 and second 5 logic inputs, as well as the first 6 outputs, the second 7 logic element inverting "I" gate with the first 8 and second 9 logic inputs, and a second output 10, antiphase first 11  and second 12 (Q) outputs of the logic device, wherein the first 4 and second 5 logic inputs have flowing input currents, and the first 6 output has flowing output current, the first 8 and second 9 logic inputs have flowing input currents, wherein the first 10 output of the second 7 inverting logical element "I" element has flowing output current, the first 3 inverting logic element "I" has an additional current output 13, 7 inverting logic element "I" has additional current output 14.
 and second 12 (Q) outputs of the logic device, wherein the first 4 and second 5 logic inputs have flowing input currents, and the first 6 output has flowing output current, the first 8 and second 9 logic inputs have flowing input currents, wherein the first 10 output of the second 7 inverting logical element "I" element has flowing output current, the first 3 inverting logic element "I" has an additional current output 13, 7 inverting logic element "I" has additional current output 14.
EFFECT: creation of RS-trigger in which the inner transformation of information is made in the form of a multi-valued current signals.
3 cl, 14 dwg
| Title | Year | Author | Number | 
|---|---|---|---|
| RS FLIP-FLOP | 2015 | 
 | RU2604682C1 | 
| RS FLIP-FLOP WITH MULTIDIGIT INTERNAL SIGNAL PRESENTATION | 2012 | 
 | RU2514789C1 | 
| BINARY CURRENT THRESHOLD RS-TRIGGER | 2018 | 
 | RU2695979C1 | 
| 2 BY 4 DECODER | 2014 | 
 | RU2559705C1 | 
| "EXCLUSIVE OR" LOGIC ELEMENT WITH MULTIDIGIT INTERNAL SIGNAL PRESENTATION | 2012 | 
 | RU2506695C1 | 
| K-DIGIT LOGICAL "MAXIMUM" ELEMENT | 2014 | 
 | RU2549144C1 | 
| SINGLE-BIT FULL ADDER WITH MULTIDIGIT INTERNAL SIGNAL NOTATION | 2012 | 
 | RU2504074C1 | 
| MULTIPLE-VALUED LOGICAL ELEMENT OF REVERSE CYCLIC SHIFT | 2014 | 
 | RU2554557C1 | 
| k-VALUE LOGIC ELEMENT "MAXIMUM" | 2014 | 
 | RU2568385C1 | 
| K-DIGIT MINIMUM GATE | 2014 | 
 | RU2553070C1 | 
Authors
Dates
2017-04-03—Published
2015-12-22—Filed