SYNCHRONIZATION OF INTERRUPT PROCESSING FOR ENERGY CONSUMPTION REDUCTION Russian patent published in 2018 - IPC G06F13/24 G06F9/48 

Abstract RU 2651238 C2

FIELD: computer engineering.

SUBSTANCE: group of inventions relates to the field of computer technology and may be used for interrupt processing. Processor comprises at least one core, including a first core; and the interrupt delay logic for: reception of the first interrupt in the first time; delay for the first delay time, which starts at the first time, processing the first interrupt by the first core, while the first interrupt is in wait status, at the second time, when processing of the second interrupt by the first kernel begins; and if the first interrupt is in the idle state at the second time, designations for the first core, begin processing the first interrupt before the completion of the first delay time, in which the second interrupt is received periodically, and for each occurrence of the second interrupt received, the second interrupt must be processed by the first kernel without deliberate delay, and the interrupt delay logic should designate for the first kernel to start processing additional interrupts in the idle state until the appropriate delay is completed and the kernel remains in the active state.

EFFECT: technical result is a reduction in the energy consumption of the processor.

19 cl, 8 dwg

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RU 2 651 238 C2

Authors

Loh, Thiam Wah

Chinya, Gautham N.

Hammarlund, Per

Fortas, Reza

Wang, Hong

Sun, Huajin

Dates

2018-04-18Published

2014-03-24Filed