FIELD: computer equipment.
SUBSTANCE: invention relates to computer engineering. Device has two instruction decoders, a multiplexer, 64-bit integer multiplying unit, two units for converting the result with a fixed point, two units for converting the result with a floating point, two multiplexers of the result, a unit for accumulating the result.
EFFECT: calculating products of fixed-point numbers, double-precision floating-point numbers, calculating sums of products of floating point numbers of half- and single-precision, as well as reducing the occupied area of the device.
4 cl, 5 dwg, 1 tbl
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