FIELD: electrical engineering.
SUBSTANCE: invention relates to electrical engineering, particularly to computer architectures and power electronics. Method for accelerated synchronization of phase-locked-loop systems in electric networks and device implementing it are made with possibility of efficiently determining optimal parameters of PLL systems, allowing to achieve synchronism with minimum misphasing during transient processes, to determine the boundaries of the operating range of phase-locked-loop systems and to simulate operation of PLL systems.
EFFECT: possibility of determining optimum parameters for achieving synchronous mode within a narrow range of phase difference and stable operation of PLL systems, high noise immunity and improved filtering properties of the system.
2 cl, 1 dwg
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