FIELD: microelectronics; manufacture of high-integration circuits. SUBSTANCE: first polysilicon film is deposited onto epitaxial layer surface after buried-layer silicon epitaxial structures with side insulation are formed, this film is locally oxidized beyond base regions of transistors, doped for next formation of passive base, masked by dielectric film. Then cuts are made in dielectric film for active base and emitter regions and near-wall dielectric elements are formed to insulate end surface of first dielectric film. Then second polysilicon film is deposited, etched by plasma-chemical method from horizontal surfaces of structure leaving sections on end surfaces of near-wall elements of dielectric, structure is planarized by depositing dielectric film and etching it before cutting polysilicon films. For final procedure, during heat treatment by diffusing dopes, base and emitter regions are made from polysilicon films, their contacts are formed and metallization is carried out. This method enables reduction of transistor emitter size determined by capabilities of lithography to values corresponding to thickness of polysilicon film which reduces capacity of emitter p-n junction and raises transistor speed of response. EFFECT: improved speed of integrated circuit. 8 dwg
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Authors
Dates
1996-12-27—Published
1988-04-04—Filed